About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

Responsibilities Include:
* Advanced semiconductor technology enablement, including PDK releases, debugging, scope / schedule negotiation and on-time delivery.
* Technology benchmark study of different foundry technologies based on detailed data, including Performance Power Area (PPA), cost and timelines. New foundry / process selection and qualification
* Work closely with our semiconductor foundries on yield improvement, process development and product debug
* Support matrix lot design and engineering wafer runs
* Process Control Monitoring parameter definition and monitoring
* Root cause and corrective action of foundry related yield issues

Specific Responsibilities/Duties Include:
* Work with Marvell CAD and Design Service engineers on technology design flow enablement by on-time on-quality delivery of foundry collaterals
* Work with Marvell Product Engineering to assist with yield debug and if necessary, work the wafer foundry on root cause and corrective actions to improve yields
* Ensure that yield improvement and control is achieved through disciplined use of statistical process control and design of experiments
* Review foundry Process Control Monitor (PCM) data and implement action plans, as needed
* Tapeout GDS to wafer foundry for new masksets, work with cross-functional team to plan engineering wafer start and splits, ensure wafers meet project timeline.
* Keep foundry related documentation (e.g. design rules, model documents) up to date and relay any changes to Engineering and how current or in-design projects are affected.

What We're Looking For

Education, Experience and Skill Requirements:
* BSEE / MSEE in Device Physics or Electrical Engineering, Ph.D. in EE preferred.
* Experience with digital and analog circuits design is a must. Experience with DFM (design for manufacturing) and advanced device (i.e. FinFET, Gate All-Around) processes a plus.
* Experience in memory technology, standard cells, or IO/ESD technology a plus.
* Min. 5+ years of experience working in a foundry or in a foundry engineer position.
* Must have a solid understanding of semi-conductor device physics and process technology as well as a basic understanding of analog and digital circuit operation
* Knowledge of inspection, test and failure analysis techniques
* Understanding of analysis tools such as SPICE model, FMEA, SPC, Cpk and DOE
* Must possess excellent communication skills both oral and written.

#LI-JS22

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .